Methodology Briefs
Methodology Briefs are also available in PDF format. To view PDF files, you will need the free Adobe Acrobat Reader. To download it, click on the icon below:

"Common Methodology for Systems Verification: Case Studies"
presented by Zaiq CTO Andreas Meyer and Zaiq Director Alex Gensuov at DesignCon 2002. (ppt 529k)
FPGA-Based Systems: To Verify or Not to Verify!
FPGA-based systems are attractive because of their re-programmability. Re-programmability can be a double-edged sword. This paper will explore the essential verification of a multiple FPGA-based system, with an emphasis on how much to verify, when you know you're done, and how to manage the process. Data from a real project is presented to illustrate the concepts and show results.
A Verification Methodology and Environment
This document lists the requirements for a next-generation verification environment, and describes characteristics of the environment that satisfy as many of the requirements as possible.
For examples of Zaiq's methodology, domain expertise and integration capabilities, click here.
Back To Top
Home | About Us | Solutions | Innovation | Jobs@Zaiq |News | Partners | Site Map | Contact Us